Phase-locked loops (PLL) have numerous applications in communications and data processing. An article by A. B. Grebene "The Monolithic Phase-locked Loop--a Versatile Building Block", pages 38 to 49, IEEE Spectrum, March 1971 describes the basic principles and design parameters of an integrated PLL together with a wide range of applications.
In the above article, FIG. 12B shows an emitter coupled multivibrator as a basic VCO circuit for integrated PLL design. FIG. 14 shows a circuit schematic of an integrated PLL including an emitter coupled multivibrator VCO having an external timing capacitor with a separate temperature compensating bias network to minimize temperature drift to oscillator frequency. However, the frequency compensation provided is apparently insufficient, taking into account manufacturing tolerances and voltage supply variations, to give a sufficiently close tolerance center frequency to lie within the capture range of the PLL without adjustment of the external timing capacitor. It should be noted that this design does not address the problems of frequency variation due to manufacturing tolerances and voltage supply tolerance.
Additional known prior art is UK Pat. No. 1,500,085 entitled "Improvements in or relating to Multivibrators". The same subject matter is published in an article by R. R. Cordell and W. A. Garrett entitled "A Highly Stable VCO for application in Monolithic Phase-locked Loops", pages 480 to 485, IEEE Journal of Solid-State Circuits, Volume SC-10, No 6, December 1975.
This Cordell et al article describes an emitter coupled integrated circuit multivibrator used with an external timing capacitor C between the emitters of two transistors and an external resistor R. Two emitter current sources are controlled by a reference voltage. The collector currents of the two transistors are controlled so that the circuit switches state when the voltage across the capacitor C equals the forward voltage of a PN junction carrying a current bearing a fixed ratio to the emitter currents. The same voltage is used as the reference voltage. It is shown theoretically that the frequency is proportional to 1/4RC and is thus independent of temperature and voltage supply variation.
However, it will be noted that the practical circuit shown in FIG. 3 of both the patent specification (UK Pat. No. 1,500,085) and the Cordell et al article is very complex and includes circuit refinements to enhance the temperature performance.
Several silicon chips are available commercially which include a voltage controlled oscillator (VCO) incorporated in a phase locked loop (PLL). However, these available PLL chips require that the center frequency of the VCO must be adjusted by trimming either an external resistor or an external capacitor, so that the center frequency lies within the capture range of the PLL. This adjustment requires the services of a skilled technician and is undesirable when the PLL is for use in equipment manufactured in large volumes e.g. alpha-numeric displays or television receivers.